Results

The following submissions are adjudged as Outstanding, Excellent, Very good and Good by the FOSSEE and the VSD teams.

List of Outstanding Circuits:

S.No Name of the Candidate Name of the Circuit College Name
1 Karthik M B Implementation of a 8-bit CMOS Wallace Tree Multiplier Maven Silicon VLSI Training Center
2 Aman Verma 4-bit Carry Lookahead Adder University of Allahabad
3 Inderjit Singh Dhanjal 8x4 right Barrel Shifter using NMOS pass transistor logic K. J Somaiya College OF Engineering
4 K Navaneeth 8 bit Successive-approximation-register Analog-to-Digital Converter N.M.A.M Institute of Technology, Nitte
5 Ganesamoorthy B SRAM cell using TRIMODE MTCMOS power and ground gated technique Chegg India Pvt Ltd
6 Avula Swapnamadhuri Approximate compressors Vignans Foundation for Science Technology and Research
7 Soorya Krishna K Design of 12 bit Carry Select Adder using CMOS Logic Srinivas Institute of Technology, Mangalore
8 Ketha Chandana Tejaswini Design of Approximate compressors Vignans Foundation for Science and Technology and Research
9 Kashish Goyal Reduced Power 8-bit (serial in Serial out) shift register. Jaypee Institute of Information Technology, Noida
10 Paras Sanjay Gidd 32-bit ALU Manipal Institute of Technology

List of Excellent Circuits:

S.No Name of the Candidate Name of the Circuit College Name
1 Mahisha.B.M Design of 2 bit Parity Generator using Pseudo NMOS logic R.M.K.Engineering College
2 Bhawarth Gupta Design of 1-bit full adder using CMOS mirror logic Bharati Vidyapeeth College of Engineering Pune
3 Anmol Saxena Dynamic charge sharing comparator Dhirubhai Ambani Institute of Information and Communication Technology
4 John Johnson V 1-Bit NP-CMOS Dynamic Full Adder National Institute of Technology Calicut
5 Aishik Das Portable Mobile Charger for outdoor trips University of Calcutta.
6 Yash Bettgeri NMOS Schmitt trigger SRAM Veermata Jijabai technological Institute
7 G Victor Swaroop Phase Frequency Detector for Phase locked loops VNR Vignan Jyothi Institute of Engineering and Technology
8 Vineet P N Bandgap Voltage reference using OP-AMP architecture. KLE Technological University, Hubballi
9 Krishnamoorthy R CMOS Differential cascade voltage switch logic(DCVSL) XOR-XNOR SRM Easwari engineering college
10 Himanshu Bhatt Five -Stage CMOS Ring Oscillator Mangalore Institute of Technology and Engineering
11 Komal M Madikar 4 bit Binary to gray code converter using 2x1 MUX KLE Technological University
12 S Sai Venkata Kishan Kumar 4-Bit Parity Generator IIIT, Tiruchirappalli
13 Pallepogu Divya Design OF 2-4 Decoder In Different CMOS Logic Styles. Vignan's Foundation for Science, Technology & Research.
14 Gyanvi Agarwal 4 Bit Binary to Gray code converter using Transmission Gate Maharaja Surajmal Institue of Technology
15 Vani chervirala 8T Full Adder VNR VJIET
16 TVN Srikar Design of IC 741 tester circuit VNRVJIET
17 Charaan S Design and Analysis of Dickson Charge Pump using CMOS technology Madras Institute of Technology Campus Anna University
18 Chiranjeevi R Low Power CMOS Analog Multiplier using skywater 130nm pdk PSG College of Technology
19 Aditi Singh Design and Analysis of TSPC D flip-flop using eSim Indira Gandhi Delhi Technical University for Women
20 Rohan V Patil Ring Oscillator Using Sky130 KLE Technological University
21 Abhishek Bhandari Current mode logic CML latch IIT Dharwad
22 Vaikunth Guruswamy Gilbert Multiplier Cell Madras Institute of Technology, Anna University

List of Very Good Circuits:

S.No Name of the Candidate Name of the Circuit College Name
1 Mohamed Abdullah Three Phase Inverter St. Xavier’s Catholic College of Engineering
2 Ayush Bhardwaj Low power and High speed 1 bit full adder circuit KIET Group of Institutions Ghaziabad
3 Kalaiarul S CMOS Schmitt Trigger PSG college of Technology
4 N Devi Shivani Two Stage Operational Amplifier Anurag university
5 Sibani Sasmala Low Voltage CMOS Schmitt Trigger Maharaja Surajmal Institute Of Technology
6 Vivek Arya A Low Power 7T SRAM cell using Supply Feedback Technique CMOS IIIT Allahabad
7 Dilip D Full Adder Using CMOS Velalar College OF Engineering And Technology
8 Vikhas V 3 Stage CMOS Ring Oscillator Sri Sivasubramaniya Nadar College of Engineering
9 Dilip Boidya Schmitt Trigger Tezpur University
10 R.V.Rohinth Ram Two Stage CMOS Operational Amplifier Madras Institute of Technology Campus, Anna University
11 Priyanka L Patil Bandgap reference circuit using simple current mirror architecture. KLE Technological University Hubballi (India)
12 Aditya Kalyani Design and Analysis of DIBO Differential Amplifier Indian Institute of Technology, Dharwad
13 Aastha Dave 3T DRAM Cell Birla Institute of Technology and Science Pilani, Hyderabad
14 Rithwik Jangam Single Stage Operational Amplifier Using CMOS Graphic era (Deemed to be University)
15 Vignesh Bharadwaj Low Power SRAM Cell BITS Pilani Hyderabad Campus
16 Shraddha Jayant Teli Half Adder KLE Technological University
17 Rohini Nandkumar Mhatre Operational Amplifier Don Bosco Institute Of Technology
18 Abhishek Singh Kushwaha Design and Analysis of Two Stage CMOS Operational Amplifier Indian Institute of Information Technology, Dharwad
19 Mohammad Shama Parveen Low Noise Low Power Amplifier for Biomedical Applications Vignan's Institute for Science, Technology and Research
20 Nikethan Poojary Design and Analysis of Half Adder Mangalore Institute of Technology and Engineering
21 Ratul Chakraborty Implementation of 3 Stage Ring Oscillator Using CMOS University of Calcutta
22 Raghav Verma Transmission Gate Based Full Adder Dronacharya Group of Institutions
23 Shalini Kanna One Bit Mirror Adder With SKY130nm PDK & eSim tool University of Massachusetts Lowell
24 Kiran K Mudhol Mirror With Multiple Outputs Kletech University Hubli
25 Mulpuri Divya Design of Low Transconductance OTA Vignans Institute for Science Technology and Research
26 Tattukolla Gowthami Ring Oscillator Vignan's Foundation for Science, Technology & Research
27 Uppala Bhargava Sai Audio Power Amplifier VNR Vignana Jyothi Institute OF Engineering And Technology
28 Aakash M Low power NAND gate based full subtractor using CMOS Technology Easwari Engineering College
29 Ajay Kumar Sahu NMOS Differential Amplifier NIT Jamshedpur
30 Perumalla Durga Vasavi Manchester encoder and Miller Encoder Vignan's Foundation for Science Technology and Research
31 Vesapaga Grace nissi Folded Cascode Amplifier Vignan's Foundation for Science, Technology & Research
32 Mangalapally Naveen Kumar LowVoltageLowPower Amplifier based on MOSFET Darlington Configuration VNR Vignana Jyothi Institute of Engineering &Technology
33 Rutuja Kage Design of Half Adder using CMOS Technology KLE Technological University,Hubli
34 Yogapriya B Darlington amplifier Easwari Engineering College
35 Akash Barman 2:4 Decoder using mixed logic CMOS gates Assam Engineering College
36 Balla Lalith Kumar Implementation of Full Adder using SkyWater 130nm PDK Gayatri Vidya Parishad College for Degree and PG Courses
37 Madhuri Hemant Kadam The Two Stage CMOS Operational Amplifier with Frequency Compensation Shree L. R. Tiwari College of Engineering
38 Siddharth Hande Full wave Bridge rectifier using CMOS Dr. D. Y. Patil Institute of Technology
39 Manasi Yadav CMOS Rail-to-Rail Operational Amplifier Institute of Technology, Nirma University
40 Samyuktha Shrruthi K R RC Phase Shift Oscillator Using FET Easwari Engineering College
41 Anjana Jahagirdar Miller compensated Two-stage operational amplifier KLE Technological University,Hubballi,Karnataka
42 Mili Anand Design of two stage op-amp IGDTUW
43 Aakash K CMOS 3 Stage Ring Oscillator using 0.25u CMOS Technology Cambridge Institute OF Technology,K R Puram Bengaluru
44 Aditya Wagh High Efficiency Dc-Dc Buck Boost Converter Walchand College of Engineering, Sangli
45 Prerana Das Full Adder using CMOS Assam Engineering College
46 Shreyas Bhat Full Adder implementation on Dynamic CMOS Logic KLE Technological university
47 Vighneshwar B Hegde CMOS Schmitt Trigger KLE Technological University Hubballi

List of Good Circuits:

S.No Name of the Candidate Name of the Circuit College Name
1 Soham Sen Design and Analysis of a 2-input NAND Gate in 130 nm CMOS Technology Amity University Kolkata
2 Hrishikesh Badiger CMOS Used As NAND Application KLE Technological University
3 Cornilious V G CMOS NAND GATE St.Xaviers Catholic College of Engineering
4 Sidhant Priyadarshi Conversion of JK flip-flop to D flip-flop using CMOS-NOT Gate. KLE Technological University
5 Vineet Gahlan A Conventional 2 input CMOS NAND gate circuit Dronacharya College of Engineering
6 Sumanto Kar NAND Gate Design FR. Conceicao Rodrigues College OF ENGG.
7 A Saniya D Flip Flop KLE Technological University
8 Jittin Varghese Mathew Design And Analysis OF 2 Input NAND Gate Using 180nm CMOS Technology Assam Don Bosco University
9 Bhavana khanapur CMOS NAND Gate Circuit KLE Technological University-Hubballi
10 Yogeshwary Shinde Two Input NOR gate using CMOS D.Y Patil Institute of Technology , Pimpri
11 S Shiva Shankar Reddy Double Edge Pulse Triggered JK Flip Flop Amrita Vishwa Vidyapeetham
12 Tarush Singh Positive Edge triggered D Flip Flop using Clocked MOS logic (Dynamic) MCT rajiv gandhi institute of technology
13 Jyoti Balappa Halkarni Design of 4:1 Multiplexer using Transmission gates KLE Technological University
14 Nalinkumar S NMOS Wilson Current Mirror Madras Institute of Technology Campus, Anna University
15 Jacintha Beena Mathias D Flip-Flop using CMOS Mangalore Institute Of Technology And Engineering
16 Adarsh S Shetty Cmos XNOR gate Mangalore Institute of Technology and Engineering
17 Minautee CMOS Transmission Gate MIT World Peace University
18 Manjunatha Design and Analysis of Two Input NAND Gate Yenepoya Institute Of Technology
19 T Akshaya 3-bit resistor string DAC BITS Pilani Hyderabad Campus
20 Soham Sen Design of a Current Mirror Circuit in 130 nm CMOS Technology Amity University Kolkata
21 Preetam Kumar CMOS Design of 2:1 Multiplexer Using Complementary Pass Transistor log IIT Delhi
22 Dhatrish Tewari D Flip Flop Using Transmission Gates NIT Jalandhar
23 Chinmaya Nlakantha Naik Design and Analysis of SR Flipflop Mangalore Institute of Technology and Engineering
24 ABU Mahamed Adil CMOS NOR Gate using SKYwater 130nm technology Assam Don Bosco University
25 Abhishek Bhat Design and Analysis of Two Input NOR Gate Mangalore Institute of Technology and Engineering
26 Souvik Chatterjee 2:1 Multiplexer Using Pass Transistor Logic Kalyani Government Engineering College
27 Sudeshna Pahari CMOS As An Inverter Circuit Institute OF Radiophysics And Electronics, University OF Calcutta
28 Fatima Shabir Zehgeer Two Input XOR Gate Using CMOS 130nm Government College Of Engineering And Technology Ganderbal Kashmir
29 Ilka Shawl CMOS NAND Gate Using 130NM Technology Government College of Engineering and Technology, Ganderbal, Kashmir
30 Mohamed Tousif 2:1 MUX USING CMOS LOGIC Atria Institute OF Technology
31 Supriya Khatoniar Design of CMOS Transmission Gate based 4:1 MUX using SKY130 PDK Tezpur University
32 Amulya Narkhede CMOS NOR Gate Ramrao Adik Institute of Technology
33 Joji Jose Designing And Implementation OF SR FLIP-FLOP Using SKY130 Technology Government Engineering College, Idukki
34 Angelyn Sweety.I NOR Gate - CMOS Technology. St.Joseph's College of Engineering, OMR, Chennai.
35 Harish krishna R 2-Input CMOS NAND Gate PSG College of Technology
36 Mohammad Khalique Khan Design of Exclusive-OR Gate using CMOS and SKY130 PDK technology Aliah University, Kolkata
37 Sayeedurrahman 2:1 multiplexer using CMOS 130nm technology ZHCET, Aligarh Muslim University
38 Raunak Giri Analysis of CMOS Inverter Assam Engineering College
39 Bindu Vaishnavi Multiplexer based design of Half Adder VNR VJIET
40 Sruthi Priya D.M Symmetric CMOS NOR Gate Easwari Engineering college
41 Kesanasetty Leela Sravani A D-Type Flip-Flop with Enhanced Timing Using Low Supply voltage. Vignan's Foundation for Science Technology and Research
42 Gokul M D Flip Flop using CMOS Technology Atria Institute of Technology
43 Sujata Hulloli Logic NAND Gate Design Using Cmos KLE Technological University Hubli
44 Raja Bisht 2:1 Multiplexer using Transmission Gate Birla Vishvakarma Mahavidyalaya
45 A Devipriya CMOS 2:1 MUX Design and Implementation Cambridge Institute of Technology, K R Puram, Bangalore
46 Ds Sai Rohith Design OF 3 Input NAND Gate Using CMOS SJCE Mysuru
47 Archika Malhotra Designing and Plotting the characteristics of a Cascode Current Mirror Indira Gandhi Delhi Technical University For Women
48 Vatsal B Patel Transmission Gate Vishwakarma Government Engineering College
49 Vignesh CMOS Inverter St Joseph Engineering College, Mangalore
50 E Balakrishna NOR Gate Using CMOS 130 Technology Dronacharya Group OF Institution, Greater Noida
51 Vanshika Tanwar NAND Gate Using CMOS in 130nm Technology Performed in e-sim Dronacharya Group Of Institutions
52 Barnali Mukherjee 2x1mux using CMOS Kalyani Government Engineering College
53 Jayantha Nayak Voltage Divider Mangalore Institute of Technology and Engineering, Moodubidri
54 Manjit Kalita SR Flip Flop using CMOS Technology Assan Engineering College
55 Dinesh Babu P CMOS Inverter Sri Ramakrishna Engineering College
56 Akhil Hadli 3T NAND Gate BMS College of Engineering
57 Jessica Danica Vaz 2:1 Multiplexer using CMOS logic Nitte Meenakshi Institute Of Technology
58 Ankit Borah D Latch using CMOS Transmission Gate(TG) switches Assam Engineering College
59 B Abhishek AND gate using CMOS technology KLE technological university, HUBLI