The following submissions are adjudged as Outstanding, Excellent, Very good and Good by the FOSSEE and the VSD teams.
List of Outstanding Circuits:
No. | Participant Name | Circuit Name | Institute | GitHub Repository |
---|---|---|---|---|
1 | Milad Vafaieenezhad | Window Comparator Along with MOD-16 Counter for Counting Based Data Line Selection Operation | Shahed University | View Repo |
2 | Krunal Badlani | Crack Sensing Circuit | Indian Institute of Technology Hyderabad | View Repo |
3 | Karuppusamy V | Flash Type ADC | Bannari Amman Institute of Technology | View Repo |
4 | Inderjit Singh Dhanjal | 32-bit SRAM implementation in eSim using Skywater 130nm CMOS technology | K. J. Somaiya College of Engineering | View Repo |
5 | Tanay Das | Design of a Class D Audio Amplifier IC Using Sliding Mode Control and Negative Feedback | Sikkim Manipal Institute of Technology | View Repo |
6 | Jayanth Nedunuri | Implementation of 4 bit Two Step Flash ADC | Jyothishmathi institute of Technology and Science | View Repo |
7 | Aishwarya Balkrishna Patil | Design and Implementation of Automatic Security Monitoring System | Kolhapur Institute of Technology’s College of Engineering, Kolhapur | View Repo |
8 | Swagatika Meher | 3-bit CMOS based TIQ comparator Flash ADC | Odisha University of Technology and Research, Bhubaneswar, Odisha | View Repo |
9 | Surya V | 3-bit Flash ADC using ROM-based Encoder | National Institute of Technology, Tiruchirapalli | View Repo |
10 | Sanket M Mantrashetti | Design of 8x8 SRAM based on 6T SRAM cell | R. V. College of Engineering | View Repo |
11 | Avishek Choudhary | 10-bit C2C DAC | Thapar Institute of Engineering and Technology | View Repo |
12 | Nalinkumar S | Implementation of Quadruple - Window Comparator Along with Prioritized MOD-16 Counter for Data Line Multiplexing Operation | Madras Institute of Technology Campus, Anna University | View Repo |
13 | Rubankumar D | Astable Multivibrator Along with MOD-16 Counter for Counting Based Data Line Selection Operation | Madras Institute of Technology Campus, Anna University | View Repo |
14 | Vanshika Tanwar | Implementation of 3 Bit Flash ADC performed in eSim | Dronacharya Group Of Institutions, Greater Noida | View Repo |
15 | Ravi Prakash Vishwakarma | 8 Bit Counter/Ramp Type ADC | Madan Mohan Malaviya University Of Technology | View Repo |
16 | E Balakrishna | Implementation of 4 Bit Flash ADC mixed signal circuit using 130nm performed in eSim | Dronacharya Group of Institution, Greater Noida | View Repo |
List of Excellent Circuits:
No. | Participant Name | Circuit Name | Institute | GitHub Repository |
---|---|---|---|---|
1 | Kanish R | MOD-10 Synchronous Counter | Rajalakshmi Engineering College | View Repo |
2 | Ashwini Kumar | Design of 4-bit Servo Tracking type ADC | Vellore Institute of Technology, Vellore | View Repo |
3 | Subhradip Chakraborty | SR Flip Flop to JK Flip Flop | Rajiv Gandhi Institute Of Petroleum Technology | View Repo |
4 | Abhash Kumar | 8T SRAM Based In-Memory DAC for AI acceleration | National Institute of Technology Patna | View Repo |
5 | Vishnu Bajjuri | Design of 2 bit comparator in mixed signal | Jyothishmathi Institute of Technology and Science | View Repo |
6 | Satvik Goel | 8-bit SAR type ADC | Madan Mohan Malaviya University of Technology, Gorakhpur | View Repo |
7 | Santanu Samanta | 4-bit Carry Look-Ahead Adder | Heritage Institute of Technology | View Repo |
8 | Ritam Tripathi | 8 Bit Dual Slope ADC using eSim | Madan Mohan Malaviya University of Technology Gorakhpur | View Repo |
9 | Shirsendu B Acharyya | Booth Multiplier | University Of Hyderabad | View Repo |
10 | Kishan Pentyala | Design of Master Slave D flipflop with an analog clock circuit | KL University | View Repo |
11 | Narra Hemanth Reddy | Implementation of Ring counter using Colpitts Oscillator and Multiplex | JNTUH College of Engineering Hyderabad | View Repo |
12 | Jagadheswaran M | 4-BIT FLASH ADC | Bannari Amman Institute of Technology | View Repo |
13 | Abhinav Pandey | Serializer Design With MUX 41 And LVDS Driver | Shree LR Tiwari college Engineering | View Repo |
14 | Darshan Datta Naik | Design of 3-Bit Flash ADC using Inverter Threshold Comparator | R. V. College of Engineering | View Repo |
15 | Kalyan Prusty | 4-bit Pipelined ADC using eSim and SKY130 | NA | View Repo |
16 | Nityanand | DESIGN OF 4 BIT COUNTER WITH CLOCK AS INVERTER CHAIN AND LOW POWER CVSL Cascode Voltage Switch Logic | Indian Institute of Science, Bangalore | View Repo |
17 | Bharath G S | Mixed signal triangular wave generator | BMS college of engineering | View Repo |
18 | Yogapriya.B | Resistance-to-Digital Converter | Easwari Engineering College | View Repo |
19 | Vinit Kumar | Consecutive Summation of Counter Output | B.S.Abdur Rahman Crescent Institute of Science & Technology | View Repo |
20 | Soham Sen | 3 BIT SYNCHRONOUS DOWN COUNTER WITH RING OSCILLATOR AS CLOCK | National Institute of Tcehnology Silchar | View Repo |
21 | Madhuri Hemant Kadam | Design of Charge Pump Phase Locked Loop in Sky130nm | Shree L. R. Tiwari College of Engineering | View Repo |
22 | Raj Nirmal | Flash ADC | Nirma University | View Repo |
23 | Parthiban V | PROGRAMMABLE GAIN INSTRUMENTATION AMPLIFIERS | Bannari Amman Institute of Technology | View Repo |
24 | Ajay Pranav P. R. | ADC INTERFACE WITH INSTRUMENTATION AMPLIFIER | Bannari Amman Institute of Technology | View Repo |
25 | Abhinandan R Appannavar | Implementation of MOD-10 Ripple Counter using mixed signal | S. D. M. College of Engineering and Technology, Dharwad-580002 | View Repo |
26 | Vinayak Prakash Mali | Self-Correcting Message System using Hamming Code | Kolhapur Institute of Technology's College of Engineering, Kolhapur | View Repo |
27 | Samyuktha Shrruthi K R | Capacitance-To-Digital Converter | Easwari Engineering College | View Repo |
28 | Tanya Tyagi | 2-bit Ripple Up-Counter using T- Flip Flop and 555 Timer Astable Multivibrator Circuit for Clock Generation | Indira Gandhi Delhi Technical University for Woman | View Repo |
29 | Rahul Tiwari | In-Memory Logic Operations with 8TSRAM cells | Techno India | View Repo |
30 | Sharmi R | Binary encoding of an analog signal using Flash type ADC | Self Employed | View Repo |
List of Very Good Circuits:
No. | Participant Name | Circuit Name | Institute | GitHub Repository |
---|---|---|---|---|
1 | Pavan Dheeraj | Handshake based pulse synchroniser | S. S. N. College of Engineering | View Repo |
2 | Syed Imaduddin | 4-Bit Asynchronous Up Counter using Mixed Signal | Zakir Husain College of Engineering and Technology | View Repo |
3 | Amisha Shyam Sakhare | Synchronous frequency divider with Astable multivibrator as clock | Birla Vishvakarma Mahavidyalaya, Engineering College | View Repo |
4 | Shounak Das | Frequency Divider Circuit using astable multivibrator and 3 bit asynchronous counter | Indian Institute Of Information Technology Allahabad | View Repo |
5 | Lavanya R | Design and Implementation of Buck-Boost Converter with PWM Generator | P. S. G. COLLEGE OF TECHNOLOGY | View Repo |
6 | Sushant Sukhadeo Gawade | Half adder using Mixed signals | Universal College of Engineering | View Repo |
7 | Srithika S | Implementation of Astable multivibrator Along With Multiplexer with Full Adder/Subtractor for Signal Shaping Operation | Madras Institute of Technology Campus, Anna University | View Repo |
8 | Subham Subhashis | 1-bit ALU | Odisha University of Technology and Research, Bhubaneswar | View Repo |
9 | Yerra Bhaskara Vara Prasad | 3-Bit Binary counter with astable multivibrator as a clock circuit | RGUKT, Nuzvid | View Repo |
10 | Partha Singha Roy | SPWM Generator | Kalyani Government Engineering College | View Repo |
11 | Hrittika Ghosh | Frequency Doubler using Mixed Signal Circuit | Jadavpur University | View Repo |
12 | Ashutosh Rao | Mixed Signal FSM Sequence Detector with CMOS Inverter | P. E. S. University | View Repo |
13 | Amreen Kaur | Unit-Distance Code Generator | Indian Institute of Technology, Hyderabad | View Repo |
14 | Venkata Sai Muralinadh Rompicharla | 1 st order Sigma-Delta Modulator ADC | Sir C R Reddy College of Engineering | View Repo |
15 | Radha Kulkarni | 4-bit Johnson Counter with Ring Oscillator using SKY130nm PDK | HCL Technologies | View Repo |
16 | Dwarakanath Dey | Design and Analysis of Pass-Transistor XOR Gate | St. Thomas’ College of Engineering & Technology, Kolkata | View Repo |
17 | Jayyasri S | CLOCK WAVE GENERATOR USING OP-AMP FOR DIGITAL COUNTER CIRCUITS | Bannari Amman Institute of Technology | View Repo |
18 | Vishal Sivakumar | VGA Clock | Mahindra University | View Repo |
19 | Narendra J | Voltage to Frequency Converter(VFC) | Bannari Amman Institute of Technology | View Repo |
20 | Kodi.Kameswararao | Frequency divider using astable multivibrator and counter | RGUKT nuzvid | View Repo |
21 | Shubhang Srivastava | 3-Bit Synchronous up counter with buffered reset | Indian Institute of Technology Jammu | View Repo |
22 | Sanket Pradeep Kulkarni | Light to Frequency Sensor Topology for Practical CMOS Color Sensor | Individual | View Repo |
23 | Vishnu Prasath S P | Dual Slope ADC | Bannari Amman Institute of Technology | View Repo |
24 | Arpit Kumar | Sequence detector | Dayananda Sagar College of Engineering | View Repo |
25 | R.V. Rohinth Ram | Analog Voltage Generation based on Gray Coded Digital Data | Madras Institute of Technology Campus, Anna University | View Repo |
26 | Shabbar Vejlani | Edge Pursuit Comparator in sky130 | Self | View Repo |
27 | Totashri P Sajjanar | Design and analysis of firstorder SigmaDelta AtoD Converter | S. D. M. College of Engineering and Technology, Dharwad. | View Repo |
28 | Ayesha Parveen | 8 Bit SRAM Mixed Signal Design using eSim with SKY130 PDK and NgVeri | Zakir Hussain College of Engineering & Technology, AMU, Aligarh | View Repo |
29 | Shreya Umarani | Staircase waveform Generation using Mixed Signals | S. D. M. College Of Engineering and Technology, Dharwad | View Repo |
30 | Gaurav Kumar | Mixed Signal Frequency Divider | Dronacharya Group of institutions | View Repo |
31 | Ayush Gupta | LTE Comparator 5-Bit Flash ADC with dual stage encoding logic | S. R. M. Institute of Science and Technology, Kattankulathur | View Repo |
32 | Anmol Singh | Pseudo Noise Sequence to Triangular and Sinusoidal Wave Converter | Dayananda Sagar College of Engineering | View Repo |
List of Good Circuits:
No. | Participant Name | Circuit Name | Institute | GitHub Repository |
---|---|---|---|---|
1 | Abdulmannan Lalshawala | Design and Implementation of Mixed Signal Circuit MUX | R. V. College of Engineering | View Repo |
2 | Dhilip S | PWM Incremental | KGiSL Institute of Technology | View Repo |
3 | Ghanshyam Verma | Implementation of Digital Phase Locked Loop using CMOS Technology | IIIT-NR | View Repo |
4 | Paras Vekariya | 2 to 1 multiplexer | International Institute of Information Technology Bangalore | View Repo |
5 | Venkatesh A | Design of JK flip flops using mixed signals | Bannari Amman Institute of Technology | View Repo |
6 | Shubham Garg | 4-bit Synchronous up/down Counter | Centre for Development of Advanced Computing (C-DAC, Noida) | View Repo |
7 | Sajja Pratyusha | 3-bit Flash Type ADC | Rajiv Gandhi University of Knowledge Technologies, AP IIIT Nuzvid | View Repo |
8 | Dharshnaa K | ADAPTIVE DELTA MODULATION CIRCUIT | Bannari Amman Institute of Technology | View Repo |
9 | Aravinth M | High Efficiency Half-Subtractor Using AVL Technology | Bannari Amman Institute of Technology | View Repo |
10 | Anandita | Design of multipurpose Counter | NIT Patna | View Repo |
11 | Kavin Parithi S | SAWTOOTH WAVEFORM GENERATOR | BANNARI AMMAN INSTITUTE OF TECHNOLOGY | View Repo |
12 | Mohammad Mudakir Fazili | 7T SRAM Cell with Peripheral Circuitry | NIT Srinagar | View Repo |
13 | Sasivarnam J | DATA IMPRINT USING SRAM | Bannari Amman Institute of Technology | View Repo |
14 | Susmitha T | MIXED CIRCUIT IN 4 to1 MULTIPLEXER | Bannari Amman Institute of Technology | View Repo |
15 | Sowndharya R | Full adder using cmos | Bannari Amman Institute of Technology | View Repo |
16 | Pradeep Kumar S L | MPU 6050 Circuit | KIT-Kalaignarkarunanidhi Institute of Technology | View Repo |
17 | Prakash Rawat | 4x12 Decoder implement using 3x8 decoder | Jagan Institute of Management Studies | View Repo |
18 | Rutucharya Panda | 6T SRAM Cell with Read and Write Operation | Silicon Institute of Technology, Bhubaneswar | View Repo |
19 | Manish Pandey | Half Adder using CMOS | Kalyani Government Engineering College | View Repo |
20 | Yuvaraj N | DFSK DEMODULATOR | Bannari Amman Institute of Technology | View Repo |
21 | P.D.Divya Sree | 4bit Flash Type analog to digital converter | Ragiv Gandhi University of knowledge and technologies(AP IIIT NUZVID) | View Repo |
22 | Mahima Goyen | Design and Implementation of 8 Bit SRAM | Texas A&M university | View Repo |
23 | Birudu Venu | Design of SRAM-Based In-Memory Macro for Energy-Efficient Deep Neural Networks | S. R. M. University Andhra Pradesh | View Repo |
24 | Aashrey Patel | Dual Slope ADC | Vishwakarma Government Engineering College | View Repo |